1. Field of the Invention
Embodiments of the present invention relate generally to the field of video playback using a graphics processing unit (“GPU”) and more specifically to a system and method for video playback using a memory local to a GPU that reduces power consumption.
2. Description of the Related Art
High performance mobile computing devices typically include high performance microprocessors and graphics adapters as well as large main memories. Since each of these components consumes considerable power, the battery life of a high performance mobile computing device is usually quite short. For many users, battery life is an important consideration when deciding which mobile computing device to purchase. Thus, longer battery life is something that sellers of high performance mobile computing devices desire.
As mentioned, the graphics adapters found in most high performance mobile computing devices consume considerable power, even when performing tasks like generating frames for display during video playback. For example, a typical graphics adapter may generate twenty to sixty frames per second. For each frame, the graphics adapter usually reads and writes large blocks of display data and video data from and to main memory. Power consumption during these read and write operations is considerable because they typically include repeatedly transferring blocks of display data and video data between main memory and the graphics adapter through intermediate elements, such as a high speed bus, a bus controller and a memory controller.
FIG. 1 illustrates a conventional mobile computing device 100 that uses video data and display data stored in main memory to generate display frames. During video playback, the mobile computing device 100 stores video data and display data in main memory and generates a sequence of display frames through read and write operations performed on the main memory by a GPU 102. As shown, the computing device 100 includes the GPU 102, a bus 112, a microprocessor 104, a main memory 106, an I/O controller 108, and a DVD player 110. The GPU 102 is coupled to the microprocessor 104 through the bus 112. The microprocessor 104 includes a memory controller 134 and is coupled to the main memory 106, which stores a software driver 138 and an application program 136, as well as display data 140 and video data 142, and the I/O controller 108, which controls the DVD player 110. The GPU 102 includes display logic 128, which generates display frames by overlaying video pixels onto display pixels during video playback, a frame buffer 124, which includes control logic 144 and generates video pixels and display pixels from video data and display data stored in the main memory 106, and a bus interface controller 126, which transfers video data and display data between the frame buffer 124 and the main memory 106 during pixel generation. The control logic 144 receives display pixel and video pixel requests from the display logic 128 and directs the bus interface controller 126 to read and write display data and video data from and to the main memory 106 during pixel generation.
When a user requests video playback from the DVD player 110, the application program 136 reads video data from the DVD player 110, stores that data in the main memory 106 as video data 142, and directs the software driver 138 to configure the GPU 102 to generate a sequence of display frames from the video data 142. Generating each new display frame begins with the display logic 128 requesting display pixels and video pixels for generating the next display frame from the frame buffer 124, which generates these pixels from display data and video data read by the control logic 144 from the main memory 106. The video data is stored in the main memory 106 as a series of encoded video images with an industry standard encoding technique, such as the Motion Picture Expert Group (“MPEG”) encoding standard. Typically, the video data 142 is constantly changing as the application program 136 reads a future encoded video data from the DVD player 110 and adds this encoded video data to the main memory 106 while the GPU 102 reads the next encoded video data from the main memory 106 and discards previously-read encoded video data from the main memory 106. In contrast to the constantly changing video data 142, the display data 140 represents regions of uniform color that do not typically change from one display frame to the next.
The regions of uniform color in the display data 140 are configured to support overlay of video images onto a display image background. By defining a region of one color, the software driver 138 configures the display logic 128 to display video pixels generated from the video data 142 over display pixels of that predefined color generated from the display data 140. For example, if the software driver 138 configures the GPU 102 to overlay a full screen video image with a 4×3 aspect ratio onto a background image with a 4×3 aspect ratio, the full screen video image completely obscures the background image. In another example, if the software driver 138 configures the GPU 102 to overlay a full screen video image with a 16×9 aspect ratio onto a background image with a 4×3 aspect ratio, the resulting overlaid images will show a full screen video image with a top and bottom frame whose color is determined by the corresponding display pixels.
Once the display logic 128 requests display pixels and video pixels for generating the next display frame from the frame buffer 124, causing the control logic 144 to read display data 140 or video data 142 from the main memory 106, the control logic 144 directs the frame buffer 124 to transmit each read request to the bus interface controller 126. For each read request the bus interface controller 126 receives, it transmits the read request to the memory controller 134, which reads the requested data from the main memory 106 and returns the requested data (“the read response”) to the GPU 102. Upon receiving the requested display data 140 and video data 142, the display logic 128 decodes the video data 142 to form a video image and generates a display image from the display data 140, before overlaying the video image onto the display image and generating a display frame accordingly.
One drawback of the computing device 100 is that multiple read and write operations between the GPU 102 and the main memory 106 consume substantial power, which can reduce the battery life for mobile computing devices. For example, read operations through the bus 112 consume power as a result of transmitting a read request from the frame buffer 124 to the memory controller 134 and transmitting a read response from the memory controller 134 to the frame buffer 124 for each read operation. Additionally, reading display data 140 or video data 142 from the main memory 106 may consume substantial power in the main memory 106 and in the memory controller 134.